Patriot Scientific der Highflyer 2006

PTSC loaned Holocom $700,000. They were unable to pay us under the terms of the loan so we foreclosed. We own all Holocom's patents and 45% of SSDI. The former CEO G. Brad Saunders along with a board member from Holocom bought the Multi-Domain Computer System. The name of their company is DataSecurus, LLC. At that point we owned 10% of this company.

In my opinion, they needed funding and that is where Pilot Power Group, Inc. and its affiliate EDMS, LLC comes into the picture. In my opinion, we agreed to this new venture as long as we received 22% of the new pie. I think over twice the amount was a sweet deal.

All of this for $700,000 short term loan. I say we came out way ahead on this deal .

From Agora-com

Event and advise the Court on or before 3:00 p.m. the day before the Pretrial Conference which paragraphs are agreed to and those that need to be addressed at the Pretrial Conference. Pretrial Objections due and objections to use of depositions Replies to Dispositive Motions (including Daubert motions) Joint Pretrial Order, Joint Proposed Jury Instructions and Form of Verdict Oppositions to Dispositive Motions (including Daubert motion^)^

Responses to dispositive motions filed prior to the dispositive motion deadline, including Daubert motions, shall be due in accordance with Local Rule CV-7(e). Motions for Summary Judgment shall comply with Local Rule

Pretrial Disclosures Due Mediation to be completed. For filing dispositive motions and any other motions that may require a hearing (including Daubert motions). Discovery Deadline: Expert Witnesses Defendant to Identify Trial Witnesses.

2 The parties are directed to Local Rule CV-7(d), which provides in part that "[iln the event a party fails to oppose a motion in the manner prescribed herein, the Court will assume that the party has no opposition." Local Rule CV-7(e) provides that a party opposing a motion has 12 days, in addition to any added time permitted under Fed. R. Civ. P. 6(3), in which to serve and file a response and any supporting documents, after which the Court will consider the submitted motion for decision.

Date Event

September 17,2007

September 4,2007

September 4,2007

August 30,2007

August 30,2007

August 1 5,2007

Designate rebuttal expert witnesses other than claims construction. Expert witness report due. Discovery Deadline Plaintiff to Identify Trial Witnesses Designate final invalidity contentions, if warranted under P.R. Party with the burden of proof to designate expert witnesses other than claims construction. Expert witness report due. Refer to Discovery Order for required information. Final infringement contentions, if warranted, under P.R. 3-6(a).

Signed by Judge Ward

biz.yahoo.com/prnews/070724/cltu046.html?.v=99

NEWS - Patriot Scientific to Buy Back Outstanding Warrants
Posted by: AGORACOM on July 24, 2007 09:07AM


CARLSBAD, Calif., July 24, 2007 -- Patriot Scientific (OTC Bulletin Board: PTSC) today announced an agreement to repurchase all outstanding warrants for its common stock held by Lincoln Ventures, LLC. Lincoln Ventures and its affiliate Swartz Private Equity have been involved in several rounds of Patriot Scientific's funding since 1997. The agreement will retire all remaining warrants held by Lincoln and Swartz.

Patriot Scientific CEO Jim Turley said, "We plan to repurchase and retire these warrants in installments between now and October. At the conclusion of this transaction, we will have removed this significant overhang in our stock and substantially strengthened our financial position."

Turley added, "Swartz and Lincoln have been steadfast and long-term investors in Patriot Scientific. We would like to thank them for their early support and their contribution to our success."

About Patriot Scientific

Patriot Scientific is a leading intellectual-property licensing company that develops, markets, and enables innovative technologies to address the demands in fast-growing markets such as wireless devices, smart cards, home appliances and gateways, set-top boxes, entertainment technology, automotive telematics, biomedical devices and industrial controllers. Headquartered in Carlsbad, Calif., information about the company can be found at www.ptsc.com.

Copies of Patriot Scientific press releases, current price quotes, stock charts and other valuable information for investors may be found at www.hawkassociates.com. An investment profile on Patriot Scientific may be found at hawkassociates.com/ptscprofile.aspx.

Safe Harbor Statement under the Private Securities Litigation Reform Act of 1995: Statements in this news release looking forward in time involve risks and uncertainties, including the risks associated with the effect of changing economic conditions, trends in the products markets, variations in the company's cash flow, market acceptance risks, patent litigation, technical development risks, seasonality and other risk factors detailed in the company's Securities and Exchange Commission filings.

    Contacts:     Investor Relations for Patriot Scientific     Ken AuYeung or Frank Hawkins, Hawk Associates, 305-451-1888     info@hawkassociates.com     Media Relations for Patriot Scientific     John Radewagen, The Hoffman Agency, 408-975-3005     jradewagen@hoffman.com

TPL news
Posted by: jonahlomu on July 24, 2007 09:15AM


The TPL Group Files Motion to Reschedule Moore Microprocessor Patent(TM) (MMP) Infringement Trial in Texas Court


Last Update: 9:01 AM ET Jul 24, 2007


CUPERTINO, Calif., Jul 24, 2007 (BUSINESS WIRE) -- The TPL Group today announced it has filed a plaintiff's motion to reschedule the Moore Microprocessor Patent(TM) (MMP) Portfolio infringement trial in the US District Court in the Eastern District of Texas from November 2007 to January 2008. The proposed rescheduling would allow additional discovery time for both plaintiffs and defendants to address the broad scope of infringing products manufactured by Toshiba, NEC and Matsushita/Panasonic/JVC.
"As we continue to drive for a speedy trial in the Texas Court, we have come to realize along with the defendants that there is a need for the additional discovery time because of the extremely broad scope and pervasiveness of infringing end user products," asserted Dan Leckrone, Chairman of the TPL Group.
About the MMP Portfolio
The Moore Microprocessor Patent Portfolio contains intellectual property that is jointly owned by the privately-held TPL Group and publicly-held Patriot Scientific Corporation (PTSC :
patriot scientific corp com
News , chart , profile , more
Last: 0.55-0.01-2.65%

Das Warrent-Thema ist bis Oktober erledigt. In Texas geht es nicht mehr darum ob die Patente verletzt werden sondern so verstehe ich das, nur noch um den Umfang der Verletzung und damit um die Entschädigungshöhe.

Gruß

Nassie

und habe schon zu verschiedenen kursen nachgelegt ...
aber ich denke, jetzt ist nochmal ein guter zeitpunt nachzulegen.
habe zu 0,41 (mit der hoffnung diese sehr gewinnbringend zu verkaufen) gerade nochmal nachgelegt .....
ich glaube...eine gute gelegenheit....
in den nächsten wochen werden wir noch weitere gute meldungen hören

June 27, 2006, and June 28, 2006, respectively.
4. In his June 27 letter, Roger Cook initiated a discussion regarding arrangements for gaining electronic access to chip design documents. GDS and netlist files are two categories
of electronic design automation (“EDA”) tools used in chip design. Despite the existence of a protective order in the case, Toshiba, which on several occasions referred to these EDA
documents as its “crown jewels,” did not want to produce them directly to TPL in their native format, although EDA documents are only readily usable in their native format.
5. On October 27, 2006, TPL provided defendants with categories listing relevant technical documents to be produced. See attached Exhibit 4, which is a true and correct copy of
a letter from Iris Mitrakos to all defense counsel dated October 27, 2006.
6. From August 2006 until May 2007, TPL was in regular negotiations with Toshiba regarding both the format of electronic design file production and the guidelines associated with the use of the files once they were produced. Toshiba initiated negotiations with the offer to produce "massive electronic files, such as GDS files, that require special software to read." See attached Exhibit 5, which is a true and correct copy of a letter from Gene Spears to Roger Cook
dated August 25, 2006.
7. During the course of these negotiations, Toshiba never disclosed what special software would be required to read the GDS files it said it would produce. Instead, Toshiba made proposals to allow a person chosen by TPL and qualified under the protective order to travel to either Marshall or Houston, Texas, to review Toshiba’s confidential documents. Subsequently, Toshiba offered to allow that person to review confidential documents at White and Case’s Palo Alto offices by sitting at a workstation and making printouts of the GDS files that he or she was viewing.
8. Attached hereto as Exhibit 6 is a true and correct copy of an email from Iris Mitrakos to all defense counsel dated September 14, 2006.
JACOBS DECLARATION ISO PLAINTIFFS' AGREED MOTION TO CONTINUE DISCOVERY AND TRIAL 9. Attached hereto as Exhibit 7 is a true and correct copy of a letter from Gene Spears to Iris Mitrakos dated September 15, 2006.
10. In late October 2006, Toshiba also offered to permit the review of GDS and netlist files at Townsend’s offices, while simultaneously stating that doing so would require obtaining special software tools. Attached hereto as Exhibit 8 is a true and correct copy of an email chain between Iris Mitrakos, Gene Spears, and Michael Hawes dated October 31 through November 1, 2006.
11. Attached hereto as Exhibit 9 is a true and correct copy of a letter from Gene Spears to Iris Mitrakos dated November 10, 2006.
12. On November 17, 2006, TPL accepted Toshiba’s offer to provide a workstation at White and Case’s Palo Alto offices and requested more information relating to the support being
provided. Attached hereto as Exhibit 10 is a true and correct copy of a letter from Iris Mitrakos to Gene Spears and Matt Antonelli dated November 17, 2006.
13. Almost two and a half months later, in a January 31, 2007, letter, Toshiba outlined the guidelines pursuant to which TPL could review the electronic design files. Attached hereto
as Exhibit 11 is a true and correct copy of a letter from Gene Spears to Iris Mitrakos dated January 31, 2007.
14. In February 2007, a review of Toshiba's production to date revealed a very limited number of schematics, layouts and netlists, most of which were of limited use due to their failure
to identify the products they reflected or because they were missing key components or modules. TPL outlined the deficiencies in the technical production in a telephone conference with Toshiba on February 2, 2007. Attached hereto as Exhibit 12 is a true and correct copy of a letter from me to Gene Spears and Michael Hawes dated February 12, 2007, reiterating these deficiencies.
15. Attached hereto as Exhibit 13 is a true and correct copy of a letter from Gene Spears to me dated February 26, 2007.
16. On March 28, 2007, TPL followed up once again with Toshiba regarding the production of electronic documents. TPL addressed in detail the relevance of the technical
JACOBS DECLARATION ISO PLAINTIFFS' AGREED MOTION TO CONTINUE DISCOVERY AND TRIAL documents it sought and pinpointed exact types of documents that were missing from Toshiba’s technical production. Attached hereto as Exhibit 14 is a true and correct copy of a letter from me to Gene Spears and Michael Hawes dated March 28, 2007.
17. By late April 2007, Toshiba finally agreed to provide native format versions of the GDS and netlist files to TPL’s counsel under terms that the NEC defendants had agreed to for NEC’s production. However, Toshiba had still not produced significant engineering and design documents. Consequently, TPL wrote to Toshiba that it was left with no option but to move to compel production of those documents. Attached hereto as Exhibit 15 is a true and correct copy of a letter from me to Gene Spears and Michael Hawes dated April 30, 2007.
18. Toshiba responded that it was interested in working on a compromise rather than bringing the issue to the Court, and the parties then engaged in a series of meet and confer discussions over the next two months.
19. In a May 3 telephonic meeting of counsel and then in a May 9, 2007, letter, TPL informed Toshiba that it would not take the depositions of its witnesses until the technical document production was complete. Attached hereto as Exhibit 16 is a true and correct copy of a letter from Iris Mitrakos to Gene Spears dated May 9, 2007.
20. On May 8, 2007, and then again on May 25, 2007, Toshiba produced netlist and GDS files for some of the Accused Products at issue in the case. Attached hereto as Exhibit 17 is
a true and correct copy of a letter from Michael Hawes to me dated May 8, 2007.
21. Attached hereto as Exhibit 18 is a true and correct copy of a letter from Michael Hawes to me dated May 24, 2007.
22. TPL reviewed these productions and found that the GDS files associated with a few of the accused chips were still missing. TPL also found that Toshiba had produced usable netlists with information for the critical PLL and oscillator modules at issue for only five of the twenty-one representative chips accused of infringement. Moreover, Toshiba had produced no netlists for approximately ten of the accused chips and to the extent that netlists were produced
JACOBS DECLARATION ISO PLAINTIFFS' AGREED MOTION TO CONTINUE DISCOVERY AND TRIAL for others of the accused chips, many of the netlists were either incomplete – missing the PLL and/or oscillator modules – or appeared to have errors.
23. Despite its sorely deficient production of key technical documents, on May 25, 2007, Toshiba offered to make its 30(b)(6) witnesses on technical topics available on June 21 and 22 with regard to three of the Accused Products. Attached hereto as Exhibit 19 is a true and correct copy of a letter from Michael Hawes to Iris Mitrakos dated May 29, 2007.
24. On June 1, 2007, TPL reiterated its request for all system-level schematics for each Toshiba Accused End-User Product corresponding to each printed circuit board in the end
user products, as well as all programming information for each Accused Chip contained within Toshiba Accused End User Products. Attached hereto as Exhibit 20 is a true and correct copy of
a letter from Iris Mitrakos to Scott Partridge dated June 1, 2007.
25. On June 14, 2007 – only six days before the date of the first technical deposition Toshiba had proposed – Toshiba produced over ten thousand pages of technical documents, many of which are in Japanese and require translation. Attached hereto as Exhibit 21 is a true and correct copy of a letter from michael Hawes to me dated June 14, 2007. TPL’s initial review
of these documents indicates that this production included many key technical documents that should have been produced from the beginning including additional GDS files, user manuals,
schematics, design specifications, timing diagrams, measurement and test data, and simulation results for clocking mechanisms in the accused chips – all highly relevant to the issues in this
matter.
26. On the same day as its document production, Toshiba also offered six witnesses to testify about the structure and operation of the twenty-one representative chips (plus an
additional chip) between July 9 and July 13, 2007, and asked that TPL inform Toshiba by June
21, 2007, whether it would be taking the depositions. Attached hereto as Exhibit 22 is a true and correct copy of a letter from Michael Hawes to Iris Mitrakos dated June 14, 2007.
27. On June 21, 2007, after having a chance to do an initial review of Toshiba’s newly produced documents, TPL informed Toshiba that it required a complete production of
JACOBS DECLARATION ISO PLAINTIFFS' AGREED MOTION TO CONTINUE DISCOVERY AND TRIAL technical documents in order to be able to take the proposed depositions. Attached hereto as Exhibit 23 is a true and correct copy of an email from Iris Mitrakos to Michael Hawes dated June 21, 2007.
28. On June 22, 2007, TPL again outlined the deficiencies in Toshiba's technical production (as described above) and again asked for a complete production of technical documents that it believed to be missing from Toshiba's production by June 26, 2007, and stated that it would not be able to take meaningful depositions without these documents. Attached hereto as Exhibit 24 is a true and correct copy of a letter from me to Michael Hawes dated June 22, 2007.
29. Toshiba responded on June 26, 2007, by stating that the GDS files1 provided to date were sufficient for purposes of taking the 30(b)(6) depositions, that it was looking into some
of the deficiencies addressed in TPL’s letter, and that some of the files being sought, such as the RTL files, were cumulative of the GDS files already produced. Toshiba also gave TPL a June
28, 2007, deadline for stating whether it would go forward with the technical depositions. Attached hereto as Exhibit 25 is a true and correct copy of a letter from Michael Hawes to me
dated June 26, 2007. 30. On June 28, 2007, Toshiba and TPL met and conferred on this issue by phone. In that conversation, Toshiba reiterated its position that the documents TPL sought were cumulative and further stated that it was "reasonably confident that TPL can get what it needs [from the witnesses] without any documents." Attached hereto as Exhibit 26 is a true and correct copy of an email from me to Gene Spears and Michael Hawes dated June 28, 2007. Toshiba’s suggestion that the GDS files provided sufficient documentation of the structure and
functionality of the Accused Chips was certainly surprising in light of Toshiba's earlier statement that it “question[ed] how much useful and necessary information you would obtain from [the
GDS] files…” Exh.
JACOBS DECLARATION ISO PLAINTIFFS' AGREED MOTION TO CONTINUE DISCOVERY AND TRIAL 31. Without waiving its right to move to compel or to retake the deposition of the 30(b)(6) witnesses again if they were not prepared, TPL agreed on June 28 to go forward with the Toshiba depositions during the week of July 9. Id.
32. On that same day, Toshiba sent TPL some, but not all, of the allegedly cumulative RTL files that TPL had been requesting for months. Attached hereto as Exhibit 27 is a true and correct copy of a letter from Robinson Vu to me dated June 28, 2007.
33. The next day, Toshiba informed TPL that now only four of its originally offered six witnesses would be available for deposition during the week of July 9th and that these remaining witnesses would be able to testify about only six representative chips rather than the twenty-two chips originally proposed. Attached hereto as Exhibit 28 is a true and correct copy
of a letter from Gene Spears to me dated June 29, 2007.
34. On July 2, 2007, TPL engaged in a telephonic meet and confer with Toshiba in which TPL asked that in light of the late production of technical documents, Toshiba (1) commit to a date certain by which the technical production would be complete, (2) produce the remaining technical 30(b)(6) witnesses in the United States for their depositions after TPL is given reasonable time to review Toshiba’s technical production and (3) provide an extension of the infringement expert report deadline without impacting the trial date. Toshiba refused.
35. Toshiba produced thousands more pages of documents on July 3, July 5, July 10, July 11, and July 16 in the midst of the scheduled 30(b)(6) depositions of Toshiba witnesses, some of whom TPL had hoped would explain key documents included within these simultaneous productions.
36. On July 18, 2007, I deposed Kenji Toyoda, one of the witnesses Toshiba had offered in response to TPL's 30(b)(6) requests. Mr. Toyoda affirmed that, although Toshiba had
not produced GDS files for two of the specific chips accused of infringing TPL's '148 patent, TMP88PU74 and TMP88PU77F, those files would have been helpful to determine the size of a
JACOBS DECLARATION ISO PLAINTIFFS' AGREED MOTION TO CONTINUE DISCOVERY AND TRIAL particular area of memory residing on the chip, which is the pivotal question in determining whether the chips are infringing.
I declare under penalty of perjury under the law of the United States of America that the foregoing is true and correct. Executed this 23rd day of July, 2007, at San Francisco, California.
/s/ Eric P. Jacobs
ERIC P. JACOBS

für die Aufklärung. Ich dachte die hatten die Firma nach der Pleite einfach übernommen.

Kommt genau gut, die Nachricht mit den Warrents,mit dem verschobenen Temin allerding, naja ich werde langsam ungeduldig...

Trotzdem, ein schöner Tag.

Grüße Abenteurer

A. This Court's Discovery Order On June 13, 2006, this Court issued its Notice of Scheduling Conference, Proposed Deadlines for Docket Control Order and Discovery Order (the "Discovery Order"). See The Declaration of Eric P. Jacobs in Support of Plaintiffs' Agreed Motion to Continue Discovery and Trial ("Jacobs Decl."), Ex. 1. Paragraph 3(b) of the Discovery Order required each party, within 45 days after the Scheduling Conference--set for July 5, 2006-- to provide every other party in Toshiba does not oppose having trial in November, December or January, but does oppose having trial any later than that. TPL urges the Court to take Toshiba's "requirements" with a grain of salt since, as explained below, Toshiba was still producing reams of key technical documents last week, and even as late as July 16, 2007, during the scheduled 30(b)(6) depositions of the very witnesses Toshiba had offered to explain these documents. See also the Declaration of Eric P. Jacobs in support of this motion and accompanying exhibits and the Declaration of Panos Jason Arvanitis in support of this motion,
MOTION TO CONTINUE DISCOVERY AND TRIAL the case with a copy of all documents, data compilations and tangible things in the possession, custody or control of that party that are relevant to the case. Id.. Plaintiffs' Timely Requests For Relevant Evidence Shortly after the Discovery Order issued, on June 27 and 28, 2006, TPL provided all three defendants in this case with a list of Accused Products (chips) and Accused Goods (enduser products or "EUPs") in order to assist them in gathering documents. See Jacobs Decl., Exs. 2 and 3. TPL specifically identified categories of technical documents to be produced including but not limited to net lists, circuit schematics, circuit simulation code and results, place and route diagrams. Additionally, TPL initiated a discussion regarding arrangements for gaining electronic access to defendants' chip-design documents. Jacobs Decl., Exh. 2. On October 27, 2006, TPL identified document categories to defendants specifically
listing relevant technical documents to be produced. Category Nos. 13, 14 and 15 sought the following: All documents concerning past sales, manufacturing, research, license or development, present sales, manufacturing, research, license or development and projected or contemplated future sales, manufacturing, research, license or development of any Accused Product. All documents concerning catalogs, code (including executable or compatible code), product specifications, flow charts, models, drawings, promotional literature, advertising, engineering design, design rules, engineering analysis and testing, for any Accused Product. All documents concerning the input and output of each design flow tool used by You in the design, development, and fabrication of each Accused Product,
including but not limited to Hardware Description Language tools (e.g., VHDL or Verilog tools), gate-level representation tools (e.g., Cadence LEF/DEF tools), netlist
MOTION TO CONTINUE DISCOVERY AND TRIAL representation tools (e.g., Cadence LEF/DEF tools), physical representation tools (e.g., GDS II tools), logic synthesis and placement tools (e.g., place and route tools), design simulation tools (e.g., SPICE tools) and clock analysis and simulation tools (e.g., jitter analysis tools), further including all documents related to library macro elements used by any such tool. Jacobs Decl. Exh. C. Defendants' Efforts To Comply Defendants assert that they have encountered significant obstacles to complying with their discovery obligations. MEI outlined the practical difficulties of securing the technical information TPL seeks in its opposition to TPL's request for leave to file amended infringement contentions. There, MEI stated: "Because Defendants are Japanese companies, with multiple divisions, tracking down information related to the originally identified accused chips was time consuming and expensive. Defendants cannot simply enter a particular chip model into a centralized computer database and determine whether and how many of such chips were sold in the United States. Rather, Defendants must provide a list of accused chips to each of its divisions that manufactures products for the United States, which then must painstakingly determine which of their products contain the accused chips. This is not a simple process. The process has also been further complicated by the fact that TPL has demanded decades old design documentation including very low level details such as the electronic design tool files (so called "netlists" and other files that are used by computer systems to design chips)." Opposition of MEI, PNA, and JVC to TPL's Second Motion to Amend Its Preliminary Infringement Contentions, p. 12-13. Presumably the other defendants, also Japanese companies, are contending with similar obstacles. In addition, as the Court is aware, MEI opposed TPL's Motion to Amend Preliminary Infringement Contentions, and declined to produce any information related to TPL's proposed
MOTION TO CONTINUE DISCOVERY AND TRIAL amended contentions before the Court decided that motion in TPL's favor on June 12, 2007. MEI and TPL are in the final stages of entering into a formal written stipulation as to the accused MEI chips, chip families and EUPs, including representative chips and EUPs. The uncertainty over the scope of TPL's accusations has evidently also hindered MEI from providing the sales, cost and profit information relating to some of its accused chips and EUPs, which is crucial to TPL's damages case. Presumably for the same reasons set forth above, NEC, too, had produced as of mid June no more than five system-level schematics, only a handful of engineering documents, and no programming information whatsoever in response to TPL's requests. On Friday, June 22, 2007, NEC produced some 30,000 pages of documents (some technical, many in Japanese). By mutual agreement, the scheduled depositions of NEC's technical witnesses were postponed because NEC had not yet produced any GDS code or netlist files, and did not expect to do so before the end of June. NEC's counsel wrote to TPL's counsel on July 3, 2007, "The last set of technical documents is being produced today." Several days later, those documents arrived. TPL is still in the process of trying to confirm whether NEC's production is complete. But even this determination will require at least a month since, as explained below, technical experts' and/or Japanese translators' services are required not only to interpret the relevant documents, but actually to complete the initial review of the entire production. See The Declaration of Panos Jason Arvanitis In Support of Plaintiffs' Agreed Motion To Continue Discovery and Trial ("Arvanitis Decl."), The other defendants assert that the lingering uncertainty as to which MEI chips are at issue in this case, which was resolved in part by the Court's June 12 Order, has disabled them from determining the full scope of their accused EUPs, since some of those products are accused on
the basis that they incorporate MEI chips.
MOTION TO CONTINUE DISCOVERY AND TRIAL
Toshiba has also found it difficult to respond to plaintiffs' document requests. After spending months to negotiate an arrangement for a TPL attorney to view Toshiba's proprietary technical documents at a supervised work station in Houston or Palo Alto, Jacobs Decl., 4-22, Exhs. 5-15, Toshiba finally produced its first installments of significant technical documents on May 8 and May 25, 2007. But these productions included mostly incomplete netlist and GDS files, which are only machine readable, for some of the Accused Products at issue in the case.Id., As of the end of May, Toshiba had produced no RTL code, which is human readable,and only a few chip-level schematics for any of the representative chips. Despite its deficient production of key technical documents, on May 25, 2007, Toshiba offered to make its technical 30(b)(6) witnesses available for deposition on three of the Accused Products. Id., Prior to this offer, TPL had informed Toshiba that it would not take the depositions until the technical document production was complete. Id., 27 and 28, Exhs. 23 and 24. On June 14, 2007, Toshiba produced over ten thousand pages of technical documents, many of them in Japanese.4 Id., Ex. 33, Arvanitis Decl.,16. On the same day, Toshiba offered six witnesses to testify about the structure and operation of the twenty-one representative chips. In reviewing these productions, TPL’s technical experts found that GDS files associated with several of the accused chips were still missing. Additionally, they found that Toshiba had produced usable netlists with information for the critical PLL and oscillator modules at issue for only 5 of the 21 representative chips accused of infringement. Moreover, Toshiba had produced no netlists for approximately 10 of the accused chips and to the extent that netlists were produced for others of the accused chips, many were either incomplete – missing the PLL and/or oscillator modules – or appeared to have errors. See Jacobs Decl, TPL’s initial review of these documents indicated that they included many key technical documents that should have been produced from the start including additional GDS files, user manuals, schematics, design specifications, timing diagrams, measurement and test data, and simulation results for clocking mechanisms in the accused chips. Jacobs Decl., Any meaningful review of these highly technical documents will take at least several weeks to complete after they have been translated.
MOTION TO CONTINUE DISCOVERY AND TRIAL
plus an additional chip) between July 9 and July 13, 2007. Id., 26. After completing an initial review of these documents, TPL informed Toshiba that it would require a complete production of technical documents by June 26, 2007, to be able to take meaningful depositions of the proposed witnesses. Id., 27 and 28, Exhs. 23 and 24. Finally, without waiving its right to move to compel or to retake the deposition of the 30(b)(6) deponents again if they were not prepared, and based on counsel's representation that the Toshiba witnesses would be able to testify as to the structure and operation of the Toshiba chips without documents, TPL agreed to go forward with the Toshiba depositions. Id., Toshiba produced more technical documents on June 29, July 3 and July 5, 10, 11 and 16, in the midst of the slate of scheduled technical depositions. Id., 32 and 35. On July 18, 2007, Kenji Toyoda, one of the witnesses Toshiba had offered in response to TPL's 30(b)(6) requests, affirmed in deposition that, although Toshiba had not produced GDS files for two of the specific chips accused of infringing TPL's '148 patent, TMP88PU74 and TMP88PU77F, those files would have been helpful to determine the size of a particular area of memory residing on those chips, which is the pivotal question in determining whether the chips are infringing. Jacobs Decl., Moreover, on July 3, 2007, for the first time, Toshiba informed Plaintiffs that Toshiba itself has no definite knowledge whether certain accused EUPs that bear Toshiba's brand name actually incorporate accused Toshiba chips, or the chips of any other defendant or a third party. Had Toshiba realized this and informed plaintiffs earlier, plaintiffs would have issued requests for additional discovery, including third-party subpoenas. Finally, Toshiba has yet to provide the sales, cost and profit information relating to some of its accused chips and EUPs. This information is obviously critical to TPL's damages case.
MOTION TO CONTINUE DISCOVERY AND TRIAL
TPL also is confronting unforeseen obstacles to analyzing and evaluating the evidence it has received so far. To the extent that defendants have produced technical information that is responsive to plaintiffs' discovery requests, they have done so for the most part in electronic formats (e.g., GDS code) that cannot be efficiently deciphered except by proprietary chip-design tools--e.g., Cadence, Synopsis) akin to those that were used to generate the code, i.e., the same tools that were used to design the accused devices in the first place. Id., Exhs. 5 and 7, Arvanitis Decl., Plaintiffs have investigated the possibility of acquiring such tools, and learned that not only are they prohibitively expensive even to lease, but, without design database information or "technology files" -- which Plaintiffs have requested since October 2006 but have not received -- there is little value in access to these tools. Accordingly, one of plaintiffs' lead technical consultants, Panos Arvanitis, has been forced to undertake rendering drawings of representative accused parts by hand. Mr. Arvanitis, in other words, is laboring to translate the GDS files defendants have produced into schematic formats, which defendants have not yet --or only recently -- produced. Not only is this effort painstaking and time-consuming, it yields results that are less reliable than the original, requested, schematics would be. The fact is that GDS files unaccompanied by technology files are, like maps with no street names, of little practical use. As Toshiba wrote to TPL in a September 15, 2006, letter, "we question how much useful and necessary information you would obtain from those [GDS] files." Jacobs Decl., Exh. In fact, the time required to analyze GDS files is orders of magnitude greater than the time that would be required to analyze schematics, the production of which has been scant so far. Arvanitis Decl. In addition, among the reams of documents TPL has received in the past month, tens of thousands of pages are in Japanese. Of course TPL has retained professional translators to assist with the analysis of these documents. But, since these consultants' services are required not only
MOTION TO CONTINUE DISCOVERY AND TRIAL
to translate the relevant documents, but actually to complete the initial review of the entire production, the sudden, recent "dump" of these documents has created a serious bottleneck in the discovery process. Id.,

III. ARGUMENT
With the deadline for affirmative expert reports in this case set for August 15, 2007, the state of discovery of key technical and damages-related documents going to the heart of TPL's case has compelled TPL to seek the requested continuance. TPL and its experts will not have enough time to analyze the documents it has received (not to mention the additional documents defendants have yet to produce), take meaningful depositions of defendants' technical witnesses and prepare expert reports on infringement or damages. Thus, TPL will suffer actual and substantial prejudice if it is not allowed the time to receive and assess all of defendants' evidence. Martel v. County of Los Angeles, 56 F.3d 993, 995 (9th Cir. 1995). As the extraordinary traffic
in meet-and-confer letters attests, TPL has been more than reasonably diligent in securing discovery, Kozikowski v. Toll Bros., 354 F.3d 16, 26 (1st Cir. 2003); United States v. Antioch Found., 822 F.2d 693, 697 (7th Cir. 1987), and defendants have attempted to cooperate, but the breadth and complexity of this case, in combination with the practical challenges of suing and defending foreign entities, have pushed the parties so far behind schedule, they are now forced to seek this relief from the Court. Since all the defendants have agreed to the requested continuances (subject to Toshiba's reservations),5 this relief will not cause any party undue prejudice. Menendez v. Perishable The intervenor ARM defendants have not been involved in these discussions, and have not agreed to the continuance; however, based on this Court's Markman ruling requiring all operands in an "instruction group" to be right justified, TPL has stipulated to non-infringement, and requested agreement to entry of a stipulated judgment of noninfringement pursuant to FRCP Rule 54(b). The parties are in the process of ironing out the language needed to implement such a Continued on the next page
MOTION TO CONTINUE DISCOVERY AND TRIAL 763 F.2d 1374, 1379-80 (11th Cir. 1985); Szeliga v. General Motors Corp., 728 F.2d 566, 568 (1st Cir. 1984); Conway v. Chemical Leaman Tank Lines, Inc., 687 F.2d 108, 112 (5th Cir. 1982).
IV. CONCLUSION
Despite the parties' efforts, at this late stage of discovery, mere days or weeks before scheduled depositions, plaintiffs are still missing key data books, system-level schematics, programming information, engineering documents, RTL and GDS code, and electronic design automation (EDA) files that they need to analyze the accused chip designs. Plaintiffs are also
missing key damages-related information. They are faced, moreover, with analyzing tens of thousands of late-produced documents that most of their counsel cannot even review for relevance because they are in Japanese or in some form of computer code. Plaintiffs are thus formidably disadvantaged in their efforts to articulate their theories of liability and damages on the schedule originally set forth by the Court. For these reasons, Plaintiffs respectfully request an additional sixty days to complete discovery and to prepare for trial.
DATED: July 23, 2007 By: /s/ Roger L. Cook

TOWNSEND and TOWNSEND and CREW LLP
Roger L. Cook, CA State Bar No. 55208
Lead Counsel
rlcook@townsend.com
Eric P. Jacobs, CA State Bar No. 88413

Register Transfer Level ("RTL") code, which I will describe below in further detail. I was also involved in developing Design For Testability ("DFT") methodology, which involves making
sure that the design of a semiconductor device meets requirements for thorough and efficient manufacturing testing via automatic generation of test vectors.
3. The process of designing a semiconductor device typically involves generating several types of documents and electronic files. The documents include traditional design documents such as architectural specifications, circuit diagrams, and schematics. The electronic files are used to develop and analyze the structures that are to be included in the microprocessor,
to perform simulations to, for example, estimate performance and power consumption, and ultimately to generate a graphical depiction of the actual structures in different layers that will be present in the final device. These electronic files include RTL code, netlists, technology files, and GDS-II files. The software tools that are used to generate and manipulate these electronic files are called Electronic Design Automation ("EDA") tools. Through my education and my experience as a design engineer at Intel, I have extensive experience working with the various types of documents, electronic files, and EDA tools that are part of a typical microprocessor design flow.
4. All of the above-listed documents (including architectural specifications, RTL code, netlists, technology files, and GDS-II files) are needed to efficiently and conclusively determine the structure and operation of the accused representative chips. To understand the importance of each type of document, it is important to recognize the distinction between analog and digital components. Some of these documents are typically used in the design of analog components, whereas others are typically used in the design of digital components. Some of the components that are at issue in this case, such as ring oscillators and Phase-Locked Loops ("PLLs"), frequently have characteristics of analog components. Other components that are at issue, such as the Central Processing Unit ("CPU") and the Input/Output ("I/O") interface,include digital components. Therefore, TPL needs documents and files relating to the design of both analog and digital components of the representative chips to prove its infringement case.
5. Architectural specifications are the highest-level documents showing the design and operation of a particular microprocessor. These specifications, which TPL has referred to as "microarchitecture design specifications" in its document requests to Toshiba, include a highlevel description of the operation of the part. For example, the architectural specifications could describe the clocking scheme, the number of clocks there are in the microprocessor, the number of stages there are in a ring oscillator, how the clocks are selected, what structures are "clocked" by the different clocks, how synchronization with the input/output interface takes place, etc.
These specifications are essential for understanding the overall architecture of the microprocessor.
6. To understand why TPL needs the other documents and files, it is important to understand the design flow for both digital and analog components. With regard to digital components, the engineers who are designing a particular microprocessor will first write RTL code. The RTL code is a Hardware Description Language (“HDL”) which, at a high level, provides a model of the microprocessor in computer code, describing all of the functions of the microprocessor. The RTL code can be thought of as being equivalent to the source code for a software program, in that both are written in a human-readable programming language. For
example, the RTL code would provide a description of the clocking sources for the CPU. Logic functions can be simulated using the RTL code to debug the design of the microprocessor.
Examples of RTL languages include Verilog and HDL. Since RTL code is frequently the highest-level description of the structure and operation of the digital components in a microprocessor, it is an efficient way to understand the structure and operation of the microprocessor. In addition, RTL code can be extremely useful in analyzing the microprocessor
because it includes comments by the design engineers regarding the structure and functionality of the microprocessor.
7. When the RTL code is complete, a logic synthesis tool is used to convert the RTL into a netlist. The netlist provides the structure of the microprocessor at the gate (or transistor)
level. An example of a gate is a set of transistors that, as a group, perform a simple logic function (such as an AND, OR or NOT operation). It is important to know the structure of the
microprocessor at the gate level because (1) it shows how the microprocessor is implemented in circuitry (as opposed to RTL, which shows how the microprocessor is implemented in computer
code); (2) it can be correlated to a GDS-II file (described below), whereas RTL code often cannot be correlated to structures in a GDS-II file; and (3) it has signal names, whereas a GDS-II file may not have signal names. Furthermore, netlists can be used to perform various simulations, such as performance and power simulations. Companies such as Synopsis and
Cadence offer logic synthesis tools capable of converting RTL code into a netlist. 8. After the netlist has been generated, and debugging and performance simulations have been run, a place and route tool is used to generate a GDS-II file. The GDS-II file is a binary file, i.e. it is not human readable. The GDS-II file is then used to produce layers of masks required to fabricate the microprocessor described in the netlist, and thus the GDS-II file is indicative of the physical structures (such as transistors and interconnecting wires) that will exist
in the microprocessor. A GDS-II viewer can be used to view the information in a GDS-II file,such as layers forming transistors, interconnecting wires, and other structures as they are to be
manufactured to form the microprocessor. The GDS-II file provides an accurate representation of the final design of the microprocessor.
9. With regard to analog components, the design flow is typically different than for digital components. This is because analog components frequently include elements that are not
amenable to design and implementation with automatic netlist generation via logic synthesis. Instead, analog components are often designed with details specified by design engineers via
schematics. Schematics are a graphical representation of transistor (or gate) connectivity,include component design information (for example, transistor sizes, resistance and capacitance values) and often include designer comments. Netlists, which are merely text files, are optionally generated for analog components, based, for example, on the schematics.
10. Another category of electronic files, called technology files, are used by various EDA tools during the design of the microprocessor. The technology files specify characteristics
and parameters of structures and elements in the manufactured microprocessor. For example, the technology files include transistor parameters and detailed information about individual layers forming the structures, such as connectivity between the layers, resistance and capacitance per unit area, etc.. Technology files are necessary to perform a process called extraction, by which the GDS-II files are converted into “post-layout” netlists. Whereas pre-layout netlists contain (often gross) estimations for some portions of the design, post-layout netlists establish more accurate estimates by taking into account the actual physical layout of structures on the substrate. Thus, the post-layout netlists generated by extraction are useful files for performing some forms of analysis, such as simulating the amount of variation in the frequency of the clock signal generated by a ring oscillator.
11. System-level documents and programming information are also important because they are the only documents that can show how the device actually works in a system. Whereas the above mentioned electronic files (such as RTL, netlist, technology files, and GDSII) show the structures inside the microprocessor, those files do not give a complete picture of how those structures are configured to work in a system. For example, a microprocessor may include multiple clocking mechanisms or multiple Input/Output interfaces, some of which may be configurable and therefore application specific. Programming information will show, in this example, which clocks are used to "clock" the CPU in what circumstances and the function and
timing of programmable signals. Therefore, programming information is necessary for understanding the operation of the microprocessor within a system. System-level information is
important to understand how signals are connected to the CPU. For example, system-level information may indicate whether or not a reference clock signal is input to the microprocessor.
System-level information may also indicate that a signal generated by a clock external to the microprocessor is input to the I/O interface in the microprocessor for clocking the I/O interface. Without system-level information, it may be impossible to determine how some of the relevant features of the accused chips operate.
12. TPL is seeking production of all the above-mentioned documents and files so that it can accurately determine the structure and operation of defendants' accused chips. Each of
these types of documents is necessary for TPL to perform a complete and accurate analysis of the design and operation of the accused representative chips for at least the following reasons.
a. The architectural specifications are necessary to show the overall design and functionality of a microprocessor.
b. The schematics are necessary to show the design of analog components of a microprocessor, such as some formulations of a ring oscillator and/or a PLL.
c. RTL code is needed because it is readable by a human, and therefore it provides an efficient way to determine the structure and/or operation of digital components of a microprocessor.
d. The netlists are necessary for tracing interconnections between various components in a microprocessor, and for identifying what various blocks of transistors are (e.g. identifying that a particular block is a CPU, an I/O interface,
etc.).
e. The GDS-II files are necessary for understanding the physical layout of structures and interconnections in a microprocessor.
f. The technology files are necessary for understanding technical details and operational characteristics of structures in the representative chips. For example, the technology files are necessary for understanding operating parameters of transistors. The technology files are also necessary for performing extraction of GDS-II files into post-layout netlists.
g. The post-layout netlists are necessary for performing accurate simulations of the performance of the representative chips, such as simulations showing variations in the frequency of clock signals generated by various clocks.
13. Because defendants have not produced all of the above-described categories of documents, the process of determining the design and operation of their accused chips has been
exceedingly difficult and in some aspects impossible. For example, TPL has GDS-II files of all the accused chips, and therefore can view those chips using a GDS-II viewer, but it is
exceedingly difficult (and sometimes impossible) to identify what the various structures are and how they are interconnected. For example, while it may be possible in some instances to identify that a particular block of transistors is a ring oscillator, the task of tracing the output of that ring oscillator to the component that it clocks is exceedingly tedious, as it requires scrolling along the surface of the chip, not only two-dimensionally but also upwards and downwards through
multiple layers of interconnecting wires. This task could be greatly simplified if TPL had access to complete netlists, which would simply state where the various interconnecting wire lead to. Furthermore, once an interconnecting wire is traced to its destination, that destination frequently is a sea of transistors whose function is not specified. Without the netlists, it is extremely difficult to determine whether those transistors form, for example, a CPU, an I/O interface, or some other structure. Again, the netlists would simply provide the name of the structure formed by the transistors. Thus, analyzing the accused products with only the GDS-II files is orders of magnitude more difficult without the other electronic files (i.e. RTL, netlists, and technology files) than it would be with those files.
14. Furthermore, some information about the accused chips simply cannot be gleaned from the GDS-II files. As explained above, the details of the analog components, such as the ring oscillator and the PLL, are best described in schematics rather than electronic files. Furthermore, GDS-II cannot be used to perform simulations on the microprocessor, such as simulations showing variations in the output frequency of the ring oscillator. Such simulations can be performed only on the netlists, either the netlists that were used to generate the GDS-II files, or preferably post-layout netlists generated using the GDS-II files and the associated technology files. Not having the technology files makes it impossible for TPL to accurately simulate the performance of the accused chips, since TPL cannot generate post-layout netlists and instead must use the netlists that were used to generate the GDS-II (many of which were produced by defendants with missing modules).

5th Pacer--ORDER GRANTING PLAINTIFFS' AGREED MOTION TO EXPEDITE

UNITED STATES DISTRICT COURT EASTERN DISTRICT OF TEXAS
MARSHALL DIVISION
Technology Properties Limited and Patriot
Scientific Corporation,
Plaintiffs,
v.
Matsushita Electric Industrial Co., Ltd.,
Panasonic Corporation of North America, JVC
Americas Corporation, NEC Electronics
America, Inc., Toshiba Corporation, Toshiba
America, Inc., Toshiba America Electronic
Components, Inc., Toshiba America
Information Systems, Inc. and Toshiba America
Consumer Products, LLC,
Defendants.
JURY DEMANDED
ORDER GRANTING PLAINTIFFS' AGREED MOTION TO EXPEDITE
BRIEFING ON PLAINTIFFS' MOTION TO CONTINUE DISCOVERY AND TRIAL
Plaintiffs TPL filed an AGREED MOTION TO EXPEDITE BRIEFING ON
MOTION TO CONTINUE DISCOVERY AND TRIAL. The Court having read and
considered the motion and good cause appearing therefore, makes the following ruling: The motion is GRANTED. Defendant Toshiba and Intervenor ARM shall file their respective oppositions to Plaintiffs' Agreed-In-Part Motion To Continue Discovery And Trial on or before August 1, 2007. Plaintiffs shall file their reply on or before August 6, 2007.

Signed by Judge Ward

www.jmdutton.com/research/ptsc/notes/ptsc_note_072407…

Das ging aber schnell.

New Pacer--UNOPPOSED SECOND MOTION TO EXTEND DEADLINE TO COMPLY WITH P.R. 3-7

UNITED STATES DISTRICT COURT FOR THE EASTERN DISTRICT OF TEXAS
MARSHALL DIVISION
TECHNOLOGY PROPERTIES
LIMITED, INC., AND PATRIOT
SCIENTIFIC CORPORATION,
Plaintiffs,
vs.
FUJITSU LIMITED, ET AL.
Defendants
UNOPPOSED SECOND MOTION TO EXTEND DEADLINE TO COMPLY WITH P.R. 3-7 COMES NOW Defendants ARM Ltd. and ARM, Inc. and file this their motion seeking an extension of the Court’s deadline regarding reliance on opinion of counsel with respect to U.S. Patent No.5,784,584 from July 23, 2007 to August 1, 2007. Plaintiffs do not oppose this motion.

Respectfully submitted,
Carl R. Roth
Texas Bar No. 901984225
cr@rothfirm.com
Michael C. Smith
Texas Bar No. 900641877
ms@rothfirm.com
THE ROTH LAW FIRM, P.C.
115 North Wellington, Suite 200
Marshall, Texas 75671
COUNSEL FOR ARM LTD. AND ARM, INC. CERTIFICATE OF SERVICE
The undersigned hereby certifies that all counsel of record who are deemed to have consented to electronic service are being served with a copy of this document via the Court’s CM/ECF system per Local Rule CV-5(a)(3) this 25th day of July, 2007. Any other counsel of record will be served by facsimile transmission and/or first class mail.

Michael C. Smith

secfilings.nasdaq.com/filingFrameset.asp?FileName=000…  

New Pacer--ORDER GRANTING UNOPPOSED SECOND MOTION TO EXTEND DEADLINE TO COMPLY WITH P.R. 3-7

UNITED STATES DISTRICT COURT FOR THE EASTERN DISTRICT OF TEXAS MARSHALL DIVISION

TECHNOLOGY PROPERTIES LIMITED, INC., AND PATRIOT SCIENTIFIC CORPORATION,

Plaintiffs,

FUJITSU LIMITED, ET AL.

Defendants

ORDER GRANTING UNOPPOSED SECOND MOTION TO EXTEND DEADLINE TO COMPLY WITH P.R. 3-7

On this day came for consideration Defendants ARM Ltd. and ARM, Inc.’s Unopposed Second Motion to Extend Deadline to Comply with P.R. 3-7 with respect to U.S. Patent No. 5,784,584 (“’584 Patent”). The Court is of the opinion that the motion should be granted. It is, therefore, ORDERED that the Unopposed Second Motion to Extend Deadline to Comply with P.R. 3-7 is GRANTED. The Defendants’ deadline to comply with P.R. 3-7 with respect to the ‘584 Patent shall be filed on or before August 1, 2007.

Signed by Judge Ward

Wurde Zeit das die Märkte etwas korrigieren. Dann geht es vielleicht gegen Jahresende wieder mit neuen Schwung in neue Höhen.

Na ja ein gutes Zeichen für PTSC, keine hysterischen Abverkäufe.

Schönes Wochenende,
wünscht der Abenteurer

es gibt ja auch wirklich keinen Grund PTSC zu verkaufen.
Alles wartet auf die Geschäftszahlen 2006/2007 und die Ausführungen des CEO zum weiteren Geschäftsverlauf.
Der Prozeß in Texas ist in der heissen Mediationsphase und weitere Lizenznehmer werden kommen.
Holocom macht eine gute Entwicklung und die Warrents werden zurückgekauft.
Es tut sich viel und der Kurs wird sich positiv entwickeln.
Bald ist Erntezeit.

Gruß

Nassie

das stimmt alles. Nur leider verhalten sich Aktionäre oft nicht rational. Vor nicht mal vier Jahren schmissen die Leute ihre Aktien aus dem Depots, nur weil Paul in der UNO eine zweitklassige Powerpoint-Präsentation über bis heute nicht gefundene Massenvernichtungswaffen vorführte. Da wurden Bluechips verramscht, die dann später wieder teuer zurückgekauft wurden. Aber was ich eigentlich damit sagen will, kann sich eine Aktie gegen die Tendenz der Märkte behaupten, dann ist das technisch gesehen ein äußerst positives Zeichen.

Ich stecke z.Z. in eine Firmengründung und könnte eigentlich jeden Cent gut gebrauchen, aber um mein PTSC-Aktienpaket ist eine große rote Schleife gewickelt. Anders ausgedrückt, Weihnachtsgeschenke darf man nicht vor Weihnachten öffnen.

In diesem Sinne,

Grüße Abenteurer
 
PS: Wenn man sich mal den Tages-Chart von Freitag ansieht, da bewegen 50tausender Pakete schon signifikant den Kurs. Wäre ich nicht schon voll investiert, würde ich genau jetzt mine ganze Kohle auf den Markt schmeißen.  

- I'm sure many of you saw our July 20 press release announcing that we've spun off DataSecurus. DataSecurus used to be called Multi-Domain Computers and was part of Holocom Networks, which we acquired back in 2006. I'm quite pleased with the deal and I wish the company’s new management every success. Patriot will retain some equity in the business and John Burns (the president of Holocom) and I will serve on the company's board of directors. As DataSecurus grows and prospers we'll be in a position to share in the rewards.

- You've probably also seen our July 24 press release announcing that we're retiring all the outstanding warrants held by Lincoln Ventures. This eliminates the last of the warrants Swartz and Lincoln have held since becoming long-term supporters and shareholders of Patriot Scientific. I'm grateful to them for the support they gave the company when times were bleak. Now that we're through that period, I felt it was time to retire any remaining obligations and put the final polish on our balance sheet.

- In September I'll be speaking at the Arch Investment Conference in New York City. This will be a great opportunity to tell the Patriot Scientific story to institutional investors, analysts, and financial press. The conference will be webcast live and archived if you're interested in the presentations but can't attend in person.

- Our licensing business took another step forward as Bull, the big French technology corporation, became the 20th licensee of our patent technology and the 18th in as many months. As always, we have every expectation of more licensees to come.

- The nature of our licensing business requires a certain amount of privacy. I know that's frustrating for people who try to "read the tea leaves" and discern what we and our partners at TPL are doing on any given day. Certainly you all understand the need to conduct negotiations with potential licensees in confidence. Neither we nor they want to jeopardize a deal by being indiscreet. I'm sure that must be exasperating for those who feel they need a detailed play-by-play of our business negotiations, but that's not going to happen. Trust that we're working with our shareholders' best interests at heart.

- We're close to appointing a new member to our board of directors. I’m a big fan of this candidate and as soon as we've crossed all the t's we'll be happy to announce this valuable new addition to our team.

- Here's to another good month!


—Jim Turley
President/CEO
Patriot Scientific Corporation

MEI served its Preliminary Invalidity Contentions (“Contentions”) on September 18, 2006, asserting a host of prior-art references against two of the TPL patents-in-suit: U.S. Patent Nos. 5,809,336 (the ‘336 patent) and 6,598,148 (“the ‘148 patent”).1 Declaration of Robert A. McFarlane (“McFarlane Decl.”) submitted concurrently herewith, ¶ 2, Exh. 1. None of MEI's obviousness contentions based on combinations of prior art references comply with Patent Local Rule 3-3 because they do not clearly identify the specific prior-art combinations that MEI claims render the patents obvious. Rather, MEI's contentions identify numerous prior art references by an assigned number and assert that virtually any combination of two or more of the references render each claim in the patents in suit invalid as obvious. Specifically, MEI claims in an improper and summary fashion that each claim of the ‘148 Patent is rendered obvious • in view of any two or more of the references designated as [1], [1.1], [1.1.1], 1TPL does not argue the deficiencies in MEI's contentions with regard to the third patent asserted
in this litigation, U.S. Patent No. 5,784,584 (“the ‘584 patent”) because, in view of the Court's claim construction, TPL is presently negotiating a stipulated judgment of noninfringement as to that patent.

TPL NOTICE OF MOTION; MPA IN SUPPORT OF MOTION TO STRIKE MEI’S INVALIDITY CONTENTIONS [1.1.2], [1.1.3], [1.1.4], [1.2], [1.3], [1.3.1], [1.4], [1.5], [1.6], and [1.7], or • in view of any one or more of the references designated as [1], [1.1], [1.1.1], [1.1.2], [1.1.3], [1.1.4], [1.2], [1.3], [1.3.1], [1.4], [1.5], and [1.6] in combination with one or more of the references designated as [3], [4], [13], or [14]. See McFarlane Decl., Exh. 1 (MEI's Preliminary Invalidity Contentions), at p. 4, ¶1(b)(i). MEI's obviousness contentions are even more open-ended as to the ‘336 Patent. MEI alleges that each of the claims in the ‘336 Patent is rendered invalid as obvious • in view of any two or more of the references designated [1], [1.1], [1.1.1], [1.1.2], [1.1.3], [1.1.4], [1.2], [1.3], [1.3.1], [1.4], [1.5], [1.6], and [1.7], or • in view of any two or more of the references designated [2], [2.1], [2.2], [2.3] and [2.4], or • in view of any two or more of the references designated [1], [1.1], [1.1.1], [1.1.2], [1.1.3], [1.1.4], [1.2], [1.3], [1.3.1], [1.4], [1.5], [1.6], [1.7], [2], [2.1], [2.2], [2.3], [2.4], [3], [4], [12], [13], and [14]. See McFarlane Decl., Exh. 1 (MEI's Preliminary Invalidity Contentions), at pp. 6-7, ¶1(b)(ii). In short, MEI asserts that virtually every conceivable combination of between two and twenty-three of the cited references renders each claim of the ‘336 Patent obvious. As explained during the meet and confer process leading up to this motion, these contentions contemplate a multitude of possible prior art combinations. See McFarlane Decl., Exh. 7 (e-mail dated July 17, 2007). Indeed, MEI's assertion that claims in the '336 Patent are rendered obvious in light of any two or more of the twenty-three cited references implicates more that 8,000,000 possible combinations of prior art.2 Moreover, by using the alternative "or" in reference to these allegations, MEI fails to even indicate which of these virtually limitless combinations are actually at issue. 2 The web page at en.wikipedia.org/wiki/Combination provides the formula for calculating possible combinations of unique elements from a given set. Using this formula, it is possible to determine the total number of possible combinations of two or more references by adding up the number of combinations possible for selecting two references, three references, etc., for each possible number of references up to and including 23. This calculation shows that:

TPL NOTICE OF MOTION; MPA IN SUPPORT OF MOTION TO STRIKE MEI’S INVALIDITY CONTENTIONS
MEI's shotgun approach impermissibly shifts the burden to TPL to speculate as to the specific combinations of references MEI purports to assert. Presenting this virtually limitless defense based on potentially millions of possible prior art combinations fails to outline the invalidity case TPL can expect to defend and wholly defeats the purpose of the Local Rules to force parties to "crystallize their theories of the case early in the litigation," Atmel Corp. v. Info. Storage Devices, 1998 WL 775115, *3 (N.D. Cal. 1998)3 and to provide "both the plaintiff and the defendant in patent cases … early notice of their infringement and invalidity contentions." Adding these possible combinations shows that there are a total of 8,388,584 possible combinations of any two or more references out of the 23 cited by MEI. As Judge Clark of this Court has explained, "[t]he local patent rules for the Eastern District of Texas were modeled after the local patent rules adopted by the Northern District of California. The particular rules at issue in this case are almost identical to their N.D. Cal. counterparts. Accordingly, this court considers opinions by courts of the Northern District of California concerning its own local patent rules as persuasive." Finisar Corp. v. DirectTV Group, Inc., 424
F.Supp. 2d 896, 897, n. 1 (E.D. Tex. 2006)

TPL NOTICE OF MOTION; MPA IN SUPPORT OF MOTION TO STRIKE MEI’S INVALIDITY CONTENTIONS
O2 Micro Int'l. Ltd. v. Monolithic Power Sys., 467 F.3d 1355, 1365-66 (Fed. Cir. 2006). Obscuring the matter even further, MEI provided a master claim chart for each patent instead of submitting a separate claim chart for each asserted prior-art reference, as is typically done to comply with the Local Patent Rules. TPL brought these deficiencies to MEI’s attention in June 2007, McFarlane Decl., 3, Exh. 2, and requested that MEI bring its Contentions into compliance with the Local Patent Rules. The parties subsequently met and conferred repeatedly over the course of almost a month. Id., 4-9. Exhs. 3-7. As of July 22, despite numerous communications clearly explaining the basis of TPL's objections, MEI inexplicably maintained that it could not understand the objections and did not respond to TPL's final request to amend the contentions or to serve contentions in similar fashion to the other defendants. Id., Exh. 7. Taken as a whole, the Contentions fail to provide the requisite notice to TPL of MEI’s actual theories of invalidity based on obviousness, leaving TPL without any proper means to evaluate and prepare to rebut those theories. Accordingly, TPL respectfully asks this Court to strike MEI's obviousness contentions based on combinations of prior art references.

II. ARGUMENT
A. The Relevant Law
35 U.S.C. section 282 requires notice of invalidity defenses that depend upon prior art to be asserted in detail, at least thirty days before trial. The judges of the Eastern District of Texas unanimously adopted the Local Patent Rules (“P.R.”) in 2005, which require that the accused infringer provide invalidity contentions within forty-five days after service of plaintiff’s infringement contentions. P.R. 3-3. The Rules also include detailed notice requirements for disclosing an invalidity defense in a patent case. Specifically, P.R. 3-3(b) requires a party opposing a claim of patent infringement to identify “[w]hether each item of prior art anticipates each asserted claim or renders it obvious. If a combination of items of prior art makes a claim obvious, each such combination, and the motivation to combine such items must be identified.” P.R. 3-3(b). Further, the Rules require the defendant to provide a “claim chart identifying where

TPL NOTICE OF MOTION; MPA IN SUPPORT OF MOTION TO STRIKE MEI’S INVALIDITY CONTENTIONS
Specifically in each alleged item of prior art each element of each asserted claim is found P.R. 3-3(c). The Rules are intended to “further the goal of full, timely discovery and provide all parties with adequate notice and information with which to litigate their cases …” Computer Acceleration, 481 F. Supp. at 624 (citing STMicroelectronics, Inc. v. Motorola, Inc. 307 F. Supp. 2d 845, 849 (E.D. Tex 2004)), and thus to speed up the litigation process and make it less expensive. Computer Acceleration Corp. v. Microsoft Corp., 481 F. Supp. 2d 620, 623 (E.D. Tex. 2007). Contentions such as those of MEI, in which the accused infringer claims that any reference from one group can be combined with any reference from another group, have been rejected as not complying with Rule 3-3. See Sick A.G. v. Omron Scientific Technologies, Inc., 2007 WL 1223675 (N.D. Cal.) (reasoning that "[w]here combinations and the motivations for such combinations are identified summarily between groups, there is a risk of including a combination that fails or a motivation that is inapplicable. If each specific combination were spelled out along with the motivation for the combination, a failing combination would be glaring and could be omitted, The failure to comply with the specific notice requirements established by the Local Rules is grounds for prohibiting the introduction of evidence of prior art. See, e.g., Ferguson Beauregard/Logic Controls v. Mega Sys., L.L.C, 350 F.3d 1327, 1347 (Fed.Cir. 2003) (affirming exclusion of prior art evidence that arguably showed invalidity because of defendant’s failure to give notice under section 282); Sandisk Corp. v. Memorex Prods, Inc., 415 F. 3d 1278, 1292 (Fed. Cir. 2005) (finding no abuse of discretion in district court’s exclusion of evidence pertaining to theories of claim construction and infringement not disclosed as required by the local patent rules and the court’s scheduling order); Finisar Corp., 424 F. Supp. 2d at 902 (not allowing assertion of late-disclosed prior art references). The district court may strike inadequate contentions, exclude undisclosed evidence and even impose cost sanctions. See Collaboration Props., Inc. v. Tandberg ASA & Tandberg, Inc., 2006 U.S. Dist. LEXIS 63653, *19-20 (N.D. Cal. 2006) (granting plaintiffs' motion to strike defendants' invalidity contentions and imposing cost sanctions on defendants). See also Informatica Corp. v. Business Objects Data Integration, 07/31/2007 Page 8 of 14

TPL NOTICE OF MOTION; MPA IN SUPPORT OF MOTION TO STRIKE MEI’S INVALIDITY CONTENTIONS

Inc., 2006 WL 463549, *1 (N.D. Cal. 2006) (granting defendants' motion to strike plaintiffs' Final Infringement Contentions for violation of a patent local rule). B. MEI's Contentions Do Not Disclose Its Invalidity Theories In Compliance With The Patent Local Rules This Court has described prior-art references as a “mine field,” which plaintiffs must traverse and defendants would rather not map: The plaintiff is at one end of a “mine field,” with each “mine” representing an invalidating piece of prior art. The plaintiff wants to know where each and every mine is before stepping onto the field. The defendant is at the other end of the field, and does not want to tell the plaintiff where any of the mines are, in the hope that Plaintiff will commit to a path, before it knows where not to step. Finisar Corp. v. DirectTV Group, Inc., 424 F.Supp. 2d at 898-99, citing James M. Amend, Patent Law: A Primer for Federal District Court Judges 19 (1998) ; see also Computer Acceleration Corp. v. Microsoft Corp., 481 F. Supp. 2d at 623. MEI’s Contentions are manifestly inadequate because they fail to identify the specific prior-art combinations that allegedly render all asserted claims of the ‘148 and the ‘336 patents obvious under 35 U.S.C. § 103. Instead, the Contentions present a group of thirteen references, referred to as the “Transputer references,” of which "any two or more" in combination are alleged to render each claim of the 148 patent obvious. MEI Contentions 1(b)(i) at 5; § 1(b)(ii)at 6. "Any two or more" of the same thirteen references, as well "as any two or more" of five different references and "any two or more" of twenty-three other references--some of which duplicate the Transputer references--are alleged to invalidate each asserted claim of the ‘336 patent. MEI Contentions § 1(b)(ii) at 6 and 7. The problem with these contentions is that, even
if TPL took it upon itself to generate the multitude of combinations they describe, it would still be unclear whether MEI is asserting with respect to a particular patent claim that two references in combination render that claim obvious or that more than two references in combination (and if so, how many more than two?) render that claim obvious. MEI's further contention that the claims of the ‘148 patent are also rendered obvious in view of any "one or more" of twelve of the thirteen Transputer references "in combination with one or more" of four other references, MEI

TPL NOTICE OF MOTION; MPA IN SUPPORT OF MOTION TO STRIKE MEI’S INVALIDITY CONTENTIONS
Contentions at § 1(b)(i) at 5, suffers from the same defences. Thus, these ill-defined allegations do little to outline or illuminate MEI's actual obviousness claims. In sum, the number of possible combinations of prior-art references MEI purports to assert is staggering. The contentions are also, expressly, overinclusive because MEI does not commit itself to the position that all of these combinations of references invalidate the TPL patent claims; rather, it asserts that two--and if not two, then more--of them in combination invalidate the claims. Even if the Local Rules permitted MEI to burden TPL with reviewing and evaluating thousands of distinct allegations of obviousness (and they do not), they certainly do not require TPL to decide which of those allegations MEI actually means, i.e., whether MEI contends that a particular asserted patent claim is invalidated by a combination of just two references or whether MEI contends that the claim is invalidated by 3 or 23 different references in combination. Since, realistically, MEI cannot present and TPL cannot rebut dozens--let alone hundreds or thousands--of invalidity claims in the course of the scheduled five-day trial, the Contentions MEI served suggest that MEI has not, in fact, "crystallized [its] theories of the case," Atmel Corp, 1998 U.S. Dist. LEXIS 17564, * 7. MEI was required to have done so long ago, and to have disclosed those theories to TPL. O2 Micro Int'l Ltd., 467 F.3d at 1365-66. A party simply cannot wait until shortly before trial to prepare its case. Id. C. TPL is Prejudiced by MEI’s Undisclosed Invalidity Contentions MEI's contentions purposely and impermissibly obfuscate its obviousness contentions, and place an unreasonable burden on TPL to decipher what MEI's contentions actually represent. More significantly, if MEI is permitted to stand on the thousand-or-more obviousness contentions it served in September 2006, its defense options as of now are virtually limitless, and TPL's burdens of discovery and analysis are commensurately unreasonable. The soonest TPL can expect to learn what MEI really might say in its defense is August 30, 2007--only days before the close of discovery, and a mere eight weeks before the currently scheduled start of trial--when defendants' experts' invalidity reports are due. This would place TPL at a formidable disadvantage in preparing its expert reports and its defense to MEI's invalidity case. TPL will be severely prejudiced preparing meaningful expert reports, dispositive motions, and to prepare for trial.

III. CONCLUSION
MEI should not be allowed to flout the requirements of the Patent Rules and then surprise TPL with previously unspecified invalidity arguments. Therefore, TPL asks the Court to strike MEI’s obviousness invalidity contentions based on the combination of prior art references.

DATED: July 31, 2007 By: /s/ Roger L. Cook
TOWNSEND and TOWNSEND and CREW LLP
Roger L. Cook, CA State Bar No. 55208
Lead Counsel

CERTIFICATE OF CONFERENCE
As set forth above and in the Declaration of Robert A. McFarlane submitted concurrently herewith, counsel for Plaintiff has conferred with counsel for Defendants in a good-faith attempt to reach an agreement regarding the deficiencies in MEI's Contentions and resolve the matter without court intervention. McFarlane Decl., 2-9, Exh. 2-7. As yet, no agreement has been
reached. Accordingly, this motion is currently opposed.

CERTIFICATE OF SERVICE
I hereby certify that counsel of record who are deemed to have consented to electronic service are being served this 31st day of July, 2007, with a copy of this document via the Court’s CM/ECF system per Local Rule CV-5(a)(3). Any other counsel of record will be served by electronic mail, facsimile transmission and/or first class mail on this same date.

4. Attached as Exhibit 3 is a true and correct copy of an e-mail dated June 28, 2007 from Mr. Antonelli to Ms. Mitrakos, asserting that the Contentions “describe in detail the specific references that may be combined, and the motivation to combine them.”
5. Attached as Exhibit 4 is a true and correct copy of a letter dated July 5, 2007 from Nancy L. Tompkins to Mr. Lender and Mr. Antonelli, reiterating the deficiencies of the Contentions.
6. Attached as Exhibit 5 is a true and correct copy of an e-mail dated July 6, 2007 from Mr. Antonelli to Ms. Tompkins, asserting that the Contentions “set forth exactly whatcombinations we allege render the patents obvious.” See Exhibit 5 at 4.
7. On July 11, 2007, I discussed the Contentions with Mr. Antonelli during a break in a deposition we were attending at Townsend and Townsend and Crew's office in Palo Alto, California.
8. Pursuant to Mr. Antonelli's request, I had a copy of a decision in Sick AG v. Omron Scientific Technologies, Inc., a matter from the Northern District of California which addresses issues similar to those raised on the present motion, forwarded to Mr. Antonelli. See Exhibit 6 (email and order).
9. Attached as Exhibit 7 is a true and correct copy of an e-mail chain dated between July 13 and July 22 setting forth additional meet and confer discussions relating to the Contentions.

Headquartered in Chelmsford, Massachusetts, the John E Boeing Company (JEBCO) represents a broad range of semiconductor and electronic component lines, which it markets and sells directly to OEM accounts and through distributors. The company’s line card encompasses diverse products used in the computer, telecommunications, data communications, medical electronics, instrumentation, contract manufacturing, industrial controls and military electronics industries. JEBCO also operates sales offices in Wallingford, Connecticut and Liverpool, New York. For more information, visit www.jebconet.com.

About IntellaSys

Operating as a TPL Group Enterprise, IntellaSys specializes in developing distributed digital media semiconductor solutions via three major product brands: SEAforth™ multicore processors, Indigita® content secure connectivity devices and OnSpec™ secure storage controllers. With headquarters in Cupertino, California, IntellaSys has seven design centers, three of which are in California as well as four others based in Arizona, Colorado, Ohio and Austria. The TPL Group, founded in 1988, focuses on the development, commercialization and management of IP assets. For more information, visit www.intellasys.net.

IntellaSys, SEAforth, OnSpec, and Indigita are trademarks of Technology Properties Limited (TPL). All other trademarks belong to their respective owners.

www.tplgroup.net/news/release.php?EDOpinion.txt

are expected to assist the Court’s efficient administration by effectively prosecuting their cases.Plaintiffs’ Continuance Motion seeks to inappropriately disrupt the Court’s schedule. The Court should not reward Plaintiffs’ delays in prosecuting its case with a continuance. Plaintiffs have only themselves to blame for any discovery delays. Plaintiffs filed this case on October 24, 2005. By July 1, 2007 (only 2 months from the close of discovery), Plaintiffs had not taken a single deposition. Plaintiffs’ delay in filing its amended infringement
contentions (“PICs”) caused the present request for continuance. Plaintiffs’ sent those amended contentions to defendants on December 23, 2006, but did not file their motion to amend until March 26, 2007 – a delay of over 3 months. Had Plaintiffs been reasonably diligent in filingtheir PICs motion, the present Continuance Motion would be unnecessary. Moreover, the history of this case indicates that Plaintiffs are using the Continuance Motion to avoid judgment on their invalid and non-infringed claims. Plaintiffs attempt to create the false illusion that Plaintiffs’ long-time refusal to pursue discovery can be blamed on any of the defendants. When ARM called Plaintiffs’ bluff on its unreasonable discovery demands and complied with discovery, Plaintiffs declined both to accept ARM’s documents and to depose ARM’s witnesses. ARM agrees with co-defendant Toshiba: if the trial delay is no more than two months, ARM would drop its opposition to the present motion. Further delay causes ARM significant harm because Plaintiffs continue to falsely accuse ARM’s licensees of infringement. ARM intervened to protect its licensees. Plaintiffs should not be permitted to use unreasonable discovery demands against other defendants to delay trial and continue their campaign of harassment against ARM’s licensees.

I. THE DISCOVERY EXCHANGES BETWEEN ARM AND PLAINTIFFS
CONFIRM THAT PLAINTIFFS REFUSE TO PURSUE DISCOVERY WHEN
OFFERED AND HAVE MANUFACTURED ALLEGED DISCOVERY DISPUTES
MERELY AS AN EXCUSE.
Plaintiffs’ protestations of discovery delays caused by defendants are belied by the interactions between ARM and Plaintiffs. In short, Plaintiffs made unreasonable discovery demands against ARM, but ARM complied with those demands. After unreasonably forcing ARM to collect and process millions and millions of documents, Plaintiffs declined to receive those documents. After serving an enormously broad 30(b)(6) notice to ARM, Plaintiffs would not even answer ARM’s letters attempting to schedule the depositions. Simply put, Plaintiffs’ discovery demands are a ruse to create the illusion of dispute and thus, justification for delay. ARM’s Responses To Plaintiffs’ Discovery. The exchanges between ARM and Plaintiffs regarding discovery demonstrate two things: Plaintiffs demand unnecessary discovery and Plaintiffs are not really interested in using any of the discovery. Sep. 29, 2006: ARM identifies to TPL the documents it understands TPL reasonably needs for discovery and requests that TPL contact ARM if additional documents are needed. TPL never responds to this letter. (Exh. A) Oct. 27, 2006: TPL sends a letter enumerating unreasonably broad categories of documents which would result in virtually every single document at ARM being produced. (Exh B.) Nov. 22, 2006: ARM informs TPL of the enormous scope of TPL’s demands and
suggests limiting ARM’s production to ARM Accused Products as such: ARM suggests that TPL define the “ARM Accused Products” as the ARM7, ARM9, ARM10, and ARM11 microprocessor core families. (Exh. C) Dec. 7, 2006: TPL rejects ARM’s limited definition and demands a much more expansive definition: You have suggested that the ARM Accused Products be defined as the "ARM7, ARM9, ARM10, and ARM11 microprocessor families." We think this definition is too narrow. The Accused Products should also include all ARM product families that are licensed to or otherwise made available to the NEC, Toshiba and MEI Defendants, or any of them, including but not limited to, the ARM7, ARM9, ARM9E, ARM10E, ARM11, Cortex, and SecurCore microprocessor families. (Exh. D) Dec. 15, 2006: ARM acquiesces in TPL’s demand to expand the definition of ARM Accused Products but warns of the enormously expensive consequences to ARM: Regarding TPL’s expansion of its request for technical documentation, ARM will endeavor to collect such documents. ARM is still investigating the scope of this expansion but it is believed to be on the order of many gigabytes of data. (Exh.E)ARM subsequently incurred the enormous expense of collecting and offering to Plaintiffs an estimated 10 million pages – a document production that Plaintiffs then declined to accept (Exh. F). On May 31, 2007, Plaintiffs served a 30(b)(6) notice to ARM. On June 14, ARM responded by identifying a witness and indicating that the deposition would need to occur in the United Kingdom since the witness’s wife was 8+ months pregnant and the witness could not travel. On June 20, ARM again wrote Plaintiffs seeking to confirm the 30(b)(6) deposition dates. On June 27, ARM again wrote Plaintiffs seeking to confirm the 30(b)(6) deposition dates letters at Exh. G). Plaintiffs did not respond to any of ARM’s letters offering a 30(b)(6) witness. The ARM / Plaintiffs Exchanges Demonstrate That Plaintiffs Seek Only To Manufacture Discovery Disputes. Plaintiffs’ discovery demands appear not to have been designed to legitimately uncover evidence that they can use at trial. Rather, as demonstrated by the interaction with ARM, Plaintiffs are using discovery to burden the defendants with enormous costs while creating an excuse to delay the trial. ARM found itself capable of responding to Plaintiffs’ unreasonable demands. Plaintiffs’ subsequent inaction demonstrates that Plaintiffs have no need – or even desire – to evaluate and use the enormous scope of discovery being demanded. Rather, Plaintiffs seek only to create discovery difficulties for the tactical advantage of being able to request delays as in the Continuance Motion.

II. ARM’S OBJECTIONS ARE NOT MOOT BECAUSE PLAINTIFFS SEEK TO
WITHHOLD LEGAL CLAIMS TO ASSERT IN A FUTURE LAWSUIT.
Plaintiffs’ brief wrongly implies that ARM’s objections are moot because of an alleged stipulation which would eliminate the ‘584 patent. Unfortunately, Plaintiffs’ proposed stipulation retains the ability to sue ARM again in the future. ARM should be entitled to a stipulation of non-infringement for all products which were, or could have been, accused of infringement. Plaintiffs’ proposed stipulation only addresses products that were specifically accused and reserves the ability to bring a future lawsuit against other products. ARM’s position is simple: either Plaintiffs bring their claims now or they should be foreclosed in the future. One specific dispute is over the whether ARM’s “Cortex” and “SecurCore” processors are included in the stipulation. Plaintiffs specifically forced ARM to collect and process documents related to these cores in an exchange between the parties: Nov. 22, 2006: Letter from ARM to TPL: ARM suggests that TPL define the “ARM Accused Products” as the ARM7, ARM9, ARM10, and ARM11 microprocessor core families. (Exh. C) Dec. 7, 2006: TPL demands a much more expansive definition: You have suggested that the ARM Accused Products be defined as the "ARM7, ARM9, ARM10, and ARM11 microprocessor families." We think this definition is too narrow. The Accused Products should also include all ARM product families that are licensed to or otherwise made available to the NEC, Toshiba and MEI Defendants, or any of them, including but not limited to, the ARM7, ARM9, ARM9E, ARM10E, ARM11, Cortex, and SecurCore microprocessor families. (Exh. D) Simply put, Plaintiffs cannot legitimately force ARM to collect and process documents regarding certain products and then reserve the ability to bring a separate lawsuit on those products. ARM’s products do not infringe Plaintiffs’ invalid claims.1 ARM should not be forced to incur unnecessary expenses defending either this lawsuit or a future lawsuit. ARM should be entitled to include in the judgment those products for which Plaintiffs demanded discovery. ARM will not contract or stipulate to less than what it should be entitled – no rational company would do so. To do so would only invite the future expense of re-litigating those same products. Accordingly, ending this dispute here and now is the appropriate course of conduct. Plaintiffs’ unreasonable stipulation raises the question: Why are they attempting to withhold the ability to threaten ARM’s products? The answer is that Plaintiffs with to continue to make unfounded accusations of infringement against ARM’s customer licensees. Inclusion of ARM’s set of products for which Plaintiffs demanded discovery into the judgment should end Plaintiffs’ campaign of harassment against ARM’s customer licensees.2 Plaintiffs may not want to stop making such unwarranted accusations, but ARM should not be forced to stipulate to anything that does not end this campaign. If Plaintiffs accept the reasonable stipulation offered by defendants, then the ‘584 patent and ARM will be out of this case. Until that point, ARM vigorously opposes any effort by Plaintiffs to delay the trial by more than two months.
1 See Exh. H. The Patent and Trademark Office recently rejected the asserted ‘584 claim as anticipated by 11 separate references – using Plaintiffs’ own claim construction.
2 Any continued accusations against ARM products in the face of a judgment may raise issues such as patent misuse, antitrust violations and unfair trade torts.

III. THE COURT SHOULD NOT CONDONE PLAINTIFFS’ REFUSAL TO
PROSECUTE ITS CASE.
Plaintiffs have been the proximate cause of any delays due to discovery. Inexplicably, Plaintiffs delayed over 20 months to start taking depositions less than 2 months before discovery closed and less than 4 months before this case was scheduled for trial. Such delays are inexcusable for any Plaintiff that is properly prosecuting its case. Plaintiffs cannot blame defendants document production for such delays. By Fall of 2006, defendants had produced many of the technical documents believed to be needed by Plaintiffs to prove their case. Even if Plaintiffs’ subsequently extremely broad additional demands were good-faith requests for information, the existing production in Fall 2006 was adequate for Plaintiffs to take depositions – to be followed up with additional depositions if so needed. Plaintiffs’ current position seems to be that depositions cannot commence until after production of every available document. Such a position leads to unnecessary delays. Discovery is a process of refining one’s litigation position through the collection of information: it is not a process of merely collecting massive information that serves no reasonable purpose in the litigation. The Continuance Motion was proximately caused by Plaintiffs’ delays in filing their motion to amend their preliminary infringement contentions. This Court denied Plaintiffs’ first attempt to amend their PICs on November 7, 2006. On December 23, Plaintiffs served defendants with a proposed new motion to amend the PICs. Plaintiffs did not file their motion to amend their PICs until March 26, 2007. Thus, Plaintiffs waited 5+ months after the Court’s initial denial of amendment and over 3 months after first approaching defendants with a new amendment to the PICs. Even accounting for negotiation with defendants after Plaintiffs’ December 23 service of new PICs, Plaintiffs’ delay in filing their motion is inexcusable. A reasonable plaintiff (facing a very near trial date) would have quickly brought the dispute to the Court by the end of January. Had Plaintiffs acted reasonably, the additional 2 months they now (ostensibly) seek would have naturally resulted from the January (rather than March 26) filing.

IV. CONCLUSION
Plaintiffs have not efficiently prosecuted their case. Thus, they now ask the Court to let them off the hook. Unfortunately, Plaintiffs offer the Court no guarantee that they will use this additional time any more wisely than they have used the 21 months since the filing of this lawsuit. ARM would agree to a 2-month delay. Plaintiffs’ conduct in this litigation does not merit the apparently unbounded extension of the case that Plaintiffs now seek.

Respectfully submitted,
James H. Wallace, Jr.
DC Bar. No. 016113

CERTIFICATE OF SERVICE
The undersigned hereby certifies that all counsel of record who are deemed to have consented to electronic service are being served with a copy of this document via the Court’s CM/ECF system per Local Rule CV-5(a)(3) this 1st day of August, 2007. Any other counsel of record will be served by facsimile transmission and/or first class mail.

Michael C. Smith